Why FPGA Architecture is field programmable?
Features of FPGA
-- Two dimensional array of customizable logic block placed in an interconnect array
-- Like PLDs programmable at users site
-- Like MPGAs, implements thousands of gates of logic in a single device
-- Employs logic and interconnect structure capable of implementing multi-level logic
-- Scalable in proportion with logic removing many of the size limitations of PLD derived two level architecture
-- FPGAs offer the benefit of both MPGAs and PLDs
--FPGAs are Based on the principle of functional completeness
--FPGA: Functionally complete elements (Logic Blocks) placed in an interconnect framework
-- Interconnection framework comprises of wire segments and switches; Provide a means to interconnect logic blocks
-- Circuits are partitioned to logic block size, mapped and routed
Field Programmability
FPGA is field programmable because of
-- Field programmability is achieved through switches (Transistors controlled by memory elements or fuses) or progammable elements
-- Switches control the following aspects
* Interconnection among wire segments
* Configuration of logic blocks
-- Distributed memory elements controlling the switches and configuration of logic blocks are together called “Configuration Memory”
Technology of Programmable Elements
-- Vary from vendor to vendor. All share the common property: Configurable in one of the two positions – ‘ON’ or ‘OFF’
-- Can be classified into three categories:
1. SRAM based
2. Fuse based
3. EPROM/EEPROM/Flash based
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