- we can save the power if we are using cmos that is power consumption is low
- cmos is preffered because we can reduce the complexity of the circuit and also much power is saved
- manufacturing cmos is difficult when compared to nmos and pmos because cmos includes both nmos and pmos,where as nmos and pmos has uniform structure and hence easy to manufacture.
- cmos is preferred over nmos, as cmos propagates both logic'1' and logic'0' with out a voltage drop.
- when using nmos only, logic '1' i.e Vdd suffers a threshold drop and the output after passing through one nmos gate would be Vdd-Vt
- hence signal margin is very important in nmos causing possible signal integrity issues
**cmos, nmos, pmos are all low powered. static power consumption is the same and Dynamic power consumption depends on the signal swing (i.e number of times data line varies)
Advantages of cmos
- high noise margin
- high packing density
- scalable Vt
- bidirectional
- minimum power dissipation
- fully restored logic levels
- high input impedance
- low power dissipation
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