IDMA Emulation
The CPM can be configured to provide general-purpose DMA functionality through the SDMA channel. Four general-purpose independent DMA (IDMA) channels are supported. In this special emulation mode,the user can specify any memory-to-memory or peripheral-to/from-memory transfers as if using dedicated DMA hardware.The general-purpose IDMA channels can operate in different user-programmable data transfer modes. The IDMA can transfer data between any combination of memory and I/O. In addition, data may be transferred in either byte, half-word, word, double-word or burst quantities (note that IDMA cannot burst to or from the dual-port RAM) and the source and destination addresses may be odd or even. The most efficient packing algorithms are used in the IDMA transfers; however, anytime the IDMA has 0x10 or more bytes to transfer, it will burst. The single-address mode (fly-by mode) gives the highest performance, allowing data to be transferred between memory and a peripheral in a single bus transaction. The chip-select and wait-state generation logic on the MPC8280 can be used with the IDMA. The bus bandwidth occupied by the IDMA can be programmed in the IDMA parameter RAM to achieve maximum system performance.
The IDMA supports two buffer handling modes—auto buffer and buffer chaining. The auto buffer mode allows blocks of data to be repeatedly moved from one location to another without user intervention. The buffer chaining mode allows a chain of blocks to be moved. The user specifies the data movement using BD tables like those used by other peripheral controllers. The BD tables reside in the dual-port RAM. Each IDMA has three signals (DREQx, DACKx and DONEx) for peripheral handshaking.
IDMA Features
The main IDMA features are as follows:
• Four independent, fully programmable DMA channels
• Dual- or single-address transfers with 32-bit address and 64-bit data capability
• Memory-to-memory, memory-to-peripheral, and peripheral-to-memory modes
• 4-Gbyte maximum block length for each buffer
• 32-bit address pointers that can be optionally incremented
• Two buffer handling modes—auto buffer and buffer chaining
• Interrupts are optionally generated for BD transfer completion, external DONE assertion, and
STOP_IDMA command completion.
• Any channel is independently configurable for data transfer from any 60x, local bus, or PCI source to any 60x, local bus, or PCI destination
• Programmable byte-order conversion is supported independently for each DMA channel
• Supports programmable 60x-bus bandwidth usage for system performance optimization
Peripheral to/from memory features include the following:
• External DREQ, DACK, and DONE signals for each channel simplifies the peripheral interface for memory-to/from-peripheral transfers
• Supports 1-, 2-, 4-, and 8-byte peripheral port sizes
• Supports standard 60x burst accesses (four consecutive 64-bit data phases) to/from peripherals
for more details check the link below:
http://rapidshare.com/files/122891977/SDMA.pdf.html
The CPM can be configured to provide general-purpose DMA functionality through the SDMA channel. Four general-purpose independent DMA (IDMA) channels are supported. In this special emulation mode,the user can specify any memory-to-memory or peripheral-to/from-memory transfers as if using dedicated DMA hardware.The general-purpose IDMA channels can operate in different user-programmable data transfer modes. The IDMA can transfer data between any combination of memory and I/O. In addition, data may be transferred in either byte, half-word, word, double-word or burst quantities (note that IDMA cannot burst to or from the dual-port RAM) and the source and destination addresses may be odd or even. The most efficient packing algorithms are used in the IDMA transfers; however, anytime the IDMA has 0x10 or more bytes to transfer, it will burst. The single-address mode (fly-by mode) gives the highest performance, allowing data to be transferred between memory and a peripheral in a single bus transaction. The chip-select and wait-state generation logic on the MPC8280 can be used with the IDMA. The bus bandwidth occupied by the IDMA can be programmed in the IDMA parameter RAM to achieve maximum system performance.
The IDMA supports two buffer handling modes—auto buffer and buffer chaining. The auto buffer mode allows blocks of data to be repeatedly moved from one location to another without user intervention. The buffer chaining mode allows a chain of blocks to be moved. The user specifies the data movement using BD tables like those used by other peripheral controllers. The BD tables reside in the dual-port RAM. Each IDMA has three signals (DREQx, DACKx and DONEx) for peripheral handshaking.
IDMA Features
The main IDMA features are as follows:
• Four independent, fully programmable DMA channels
• Dual- or single-address transfers with 32-bit address and 64-bit data capability
• Memory-to-memory, memory-to-peripheral, and peripheral-to-memory modes
• 4-Gbyte maximum block length for each buffer
• 32-bit address pointers that can be optionally incremented
• Two buffer handling modes—auto buffer and buffer chaining
• Interrupts are optionally generated for BD transfer completion, external DONE assertion, and
STOP_IDMA command completion.
• Any channel is independently configurable for data transfer from any 60x, local bus, or PCI source to any 60x, local bus, or PCI destination
• Programmable byte-order conversion is supported independently for each DMA channel
• Supports programmable 60x-bus bandwidth usage for system performance optimization
Peripheral to/from memory features include the following:
• External DREQ, DACK, and DONE signals for each channel simplifies the peripheral interface for memory-to/from-peripheral transfers
• Supports 1-, 2-, 4-, and 8-byte peripheral port sizes
• Supports standard 60x burst accesses (four consecutive 64-bit data phases) to/from peripherals
for more details check the link below:
http://rapidshare.com/files/122891977/SDMA.pdf.html
No comments:
Post a Comment