24.6.08

TMS320C54x DSP Processor

TMS320C54x DSP Processor

  • The TMS320C54xE DSP is a fixed-point digital signal processor (DSP)
  • it can use either of two forms of the instruction set:
  1. a mnemonic form
  2. an algebraic form.
FEATURES
  • it uses harvard architecture
  • one program 3 data memory spaces with separate buses
  • simultaneous accesses to a program instruction and two data operands and writing result at the same time
  • on chip ROM,dual RAM,single access RAM.
  • Transfers between the memory spaces are also possible.
  • a powerful instruction set with hard ware supported.
  • single instruction repeat and block repeat operations,block memory move instructions.
  • Arithmetic instructions with parallel and store.
  • It has on chip peripherals like clock generator. hard ware timer,wait state generator,parallel I/O ports,serial I/O ports...
BUS STRUCTURE
  • four pairs of 16-bit buses (PAB,PB,CAB,CB,DAB,DB,EAB,EB)
  • each pair consists of an address bus and data bus
  • One program bus pair-PAB,PB
  • 3 Data bus pairs-CAB,CB,DAB,DB,EAB,EB.


CPU
  • 40 bit ALU
  • two 40-bit accumulators
  • a barrel shifter
  • a 17 x 17 bit multiplier
  • a 40-bit adder
  • a cssu(compare,select and store unit) unit
  • an exponent encoder
  • DAGEN
  • PAGEN
  • a MAC UNIT
for more details of instruction set check the below link.

TMS320C54x DSP Reference Set Volume 2: Mnemonic Instruction Set

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